1. Field of the Invention
The present invention relates to a method and a device for performing switchover operations in a computer system having at least two execution units.
2. Description of Related Art
Transient errors, triggered by alpha particles or cosmic radiation, are an increasing problem for integrated semiconductor circuits. Due to declining structure widths, decreasing voltages and higher clock frequencies, there is an increased probability that a voltage spike, caused by an alpha particle or by cosmic radiation, will falsify a logic value in an integrated circuit. The effect can be a false calculation result. In safety-relevant systems, especially in the motor vehicle, such errors must therefore be reliably detected.
In safety-relevant systems such as an ABS control system in a motor vehicle where malfunctions of the electronic equipment must be detected with certainty, redundancies for error detection are normally used in the corresponding control devices of such systems. For instance, in known ABS systems, the complete microcontroller is duplicated in each case, the total ABS functions being calculated redundantly and checked for agreement. If a discrepancy appears in the results, the ABS system is switched off.
Essential components of a microcontroller are, for one, storage modules (e.g., RAM, ROM, cache), the core and the input/output interfaces, the so-called peripherals (e.g., analog-digital converter, CAN interface). Since storage elements can be effectively monitored using test codes (parity or ECC), and peripherals are often monitored specific to the application as part of a sensor signal path or actuator signal path, a further redundancy approach lies in solely doubling the core of a microcontroller.
Such microcontrollers having two integrated cores are also known as dual-core architectures. Both cores execute the same program segment redundantly and in clock-controlled synchronism (lockstep mode), the results of the two cores are compared, and an error will then be detected in the comparison for agreement. This configuration of a dual-core system may be denoted as a compare mode.
Dual-core architectures are also used in other applications to increase output, i.e., for performance enhancement. Both cores execute different programs, program segments and instructions, whereby an increase in output can be achieved, which is why this configuration of a dual-core system may be denoted as a performance mode. This system is also called a symmetrical multiprocessor system (SMP).
An expansion of these systems involves a switchover between these two modes, by software, by way of an access to a special address and specialized hardware devices. In compare mode, the output signals of the cores are compared to each other. In performance mode, the two cores operate as a symmetrical multiprocessor system (SMP) and execute different programs, program segments or instructions.
When using such systems, the problem occurs that in the switchover, it is also necessary to switch interrupt sources. Therefore, the object of the present invention is to provide methods and means which permit an optimal switchover of the interrupt sources.